{"id":306,"date":"2020-10-30T09:44:35","date_gmt":"2020-10-30T09:44:35","guid":{"rendered":"https:\/\/sii.ua\/?case-study=built-in-chip-test-framework-for-wafer-testing"},"modified":"2020-10-30T09:44:35","modified_gmt":"2020-10-30T09:44:35","slug":"built-in-chip-test-framework-for-wafer-testing","status":"publish","type":"case-study","link":"https:\/\/sii.ua\/en\/case-study\/built-in-chip-test-framework-for-wafer-testing\/","title":{"rendered":"Built-in chip test framework for wafer testing"},"content":{"rendered":"<h2>The challenge<\/h2>\n<p>Silicon wafer production required an easy way of detecting and rejecting damaged chips at the earliest possible stage. A built-in ROM test framework allows for chip testing in the factory, with the use of test inbuilt-in the system.<\/p>\n<h2>What we did<\/h2>\n<p>Built-in chip (ROM) test framework design:<\/p>\n<ul>\n<li>specification of requirements,<\/li>\n<li>architectural design,<\/li>\n<li>design of security features.<\/li>\n<\/ul>\n<p>Built-in chip (ROM) test framework development:<\/p>\n<ul>\n<li>virgin device handling<\/li>\n<li>secure card code loading to RAM and NVM<\/li>\n<li>built-in chip test procedures (ROM)<\/li>\n<li>wired communication<\/li>\n<li>security features using symetric &amp; asymetric primitives.<\/li>\n<\/ul>\n<p>Built-in chip (ROM) test framework validation:<\/p>\n<ul>\n<li>test plan specification,<\/li>\n<li>test specification,<\/li>\n<li>test implementation,<\/li>\n<li>automated testing.<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>The challenge Silicon wafer production required an easy way of detecting and rejecting damaged chips at the earliest possible stage. &hellip; <a class=\"continued-btn\" href=\"https:\/\/sii.ua\/en\/case-study\/built-in-chip-test-framework-for-wafer-testing\/\">Continued<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"template":"views\/single-old-case-study.blade.php","offering":[204],"industry":[1107],"client":[26],"technologies":[270,269,273,682],"country":[],"class_list":["post-306","case-study","type-case-study","status-publish","hentry","offering-embedded-systems","industry-high-tech-semiconductors","client-nxp-en","technologies-assembler","technologies-embedded-c","technologies-java","technologies-tcl-2"],"acf":[],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/case-study\/306"}],"collection":[{"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/case-study"}],"about":[{"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/types\/case-study"}],"author":[{"embeddable":true,"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/users\/1"}],"wp:attachment":[{"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/media?parent=306"}],"wp:term":[{"taxonomy":"offering","embeddable":true,"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/offering?post=306"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/industry?post=306"},{"taxonomy":"client","embeddable":true,"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/client?post=306"},{"taxonomy":"technologies","embeddable":true,"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/technologies?post=306"},{"taxonomy":"country","embeddable":true,"href":"https:\/\/sii.ua\/en\/wp-json\/wp\/v2\/country?post=306"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}